generate register model from sonics ipxact

Therefore, simulation is inadequate for this purpose as it is entirely dependent on the quality of stimulus, which leads to missed issues. In simulation, a series of read and write interactions would require testing for each register, as well as ensuring that registers behave independently of each other, clearly requiring a potentially large stimulus file. Today, register operation is often checked using simulation. Carefully reading a modern memory map specification to ensure system consistency takes many hours, and is extremely error prone given the typically large number of registers. This map might form part of a specification in the case of the IP block coming from a third party. The register addresses are defined by a memory or register map, a common document used throughout hardware, software, system/IP integration and verification engineering to ensure consistency. OneSpin’s Register Checking App automatically generates formal assertions from a given register map specification in IP-XACT, and provides an exhaustive verification of all operational aspects, while cutting down on run-time. As some blocks may contain hundreds of registers, with a nested implementation to handle addressing, issues are hard to find using simulation, requiring long run time, while still not being exhaustive.

A very common source of errors in a system is a mismatch between some aspect of the register hardware implementation and its specification. These registers are used to configure, control and monitor the operation of the block, often loaded or read from a system processor utilizing a related driver software function. Almost every block in an electronic design contains a series of registers.

Generate register model from sonics ipxact